An integrated circuit comprises a large number of semiconductor devices, such as transistors, that are fabricated on a semiconductor substrate. Integrated circuits are produced in quantity on fabrication lines. Before an integrated circuit is sold, the manufacturer tests the integrated circuit for defects so that corrective action can be taken, if possible. To test the integrated circuit, the manufacturer applies test signals to selected pins of the integrated circuit. To speed up the process of testing large integrated circuits such as memory devices, the signals used to test the integrated circuit differ from the signals used in normal operation, even though the signals in both modes use the same pins of the integrated circuit. Therefore, designers have developed various techniques to differentiate test and normal modes of operation. Because this test mode should not be used once the chip successfully completes the tests, precautions must be taken to assure that the ultimate user of the integrated circuit cannot inadvertently activate the test mode.
In a typical dynamic random access memory (DRAM) device, a voltage that is above the power supply voltage for the integrated circuit, referred to as a super-voltage, is applied to a pin to place the device into test mode. Once in test mode, the manufacturer can test the operation of the memory device. To exit test mode, the super-voltage is removed from the pin. By using the super-voltage to enter test mode, it is unlikely that an end user will place the device in test mode inadvertently. As the size of integrated circuits gets smaller, the risk of damaging the integrated circuit due to dielectric and junction breakdown increases when a super-voltage is used.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for a circuit and method for entering test mode that reduces the risk of damage to the integrated circuit.